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general description the MAX9760?ax9763 family combines a stereo or mono 3w bridge-tied load (btl) audio power amplifier, stereo single-ended headphone amplifier, headphone sensing, and a 2:1 input multiplexer all in a tiny 28-pin thin qfn package. these devices operate from a sin- gle 4.5v to 5.5v supply and feature an industry-leading 100db psrr, allowing these devices to operate from noisy supplies without the addition of a linear regulator. an ultra-low 0.002% thd+n ensures clean, low-distor- tion amplification of the audio signal. patented click- and-pop suppression eliminates audible transients on power and shutdown cycles. power-saving features include low 4mv v os (minimizes dc current drain through the speakers), low 13ma supply current, and a 10? shutdown mode. a mute function allows the out- puts to be quickly enabled or disabled. a headphone sense input detects the presence of a headphone jack and automatically configures the amplifiers for either speaker or headphone mode. in speaker mode, the amplifiers can deliver up to 3w of continuous average power into a 3 ? load. in head- phone mode, the amplifier can deliver up to 200mw of continuous average power into a 16 ? load. the gain of the amplifiers is externally set, allowing maximum flexi- bility in optimizing output levels for a given load. the amplifiers also feature a 2:1 input multiplexer, allowing multiple audio sources to be selected. the multiplexer can also be used to compensate for limitations in the frequency response of the loud speakers by selecting an external equalizer network. the various functions are controlled by either an i 2 c-compatible or simple parallel control interface. the MAX9760?ax9763 are available in either a ther- mally efficient 28-pin thin qfn package (5mm ? 5mm ? 0.8mm) or a tssop-ep package. all devices have ther- mal overload protection (ovp) and are specified over the extended -40? to +85? temperature range. applications notebooks portable dvd players tablet pcs pc audio peripherals camcorders features industry-leading, ultra-high 100db psrr pc99/01 compliant 3w btl stereo speaker amplifier 200mw stereo headphone amplifier low 0.002% thd+n patented click-and-pop suppression esd-protected outputs low quiescent current: 13ma low-power shutdown mode: 10a mute function headphone sense input stereo 2:1 input multiplexer optional 2-wire, i 2 c-compatible or parallel interface tiny 28-pin thin qfn (5mm ? 5mm ? 0.8mm) and tssop-ep packages MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ________________________________________________________________ maxim integrated products 1 se/ btl single supply 4.5v to 5.5v i 2 c- compatible MAX9760 left in 1 left in 2 right in 1 right in 2 control simplified block diagram ordering information 19-2744; rev 0; 1/03 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package MAX9760 eti -40 c to +85 c 28 thin qfn-ep* MAX9760eui -40 c to +85 c 28 tssop-ep* pin configurations and functional diagrams appear at end of data sheet. ordering information continued at end of data sheet. *ep = exposed paddle.
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ...........................................................................+6v sv dd to gnd .........................................................................+6v sv dd to v dd .........................................................................-0.3v pv dd to v dd .......................................................................0.3v pgnd to gnd.....................................................................0.3v all other pins to gnd.................................-0.3v to (v dd + 0.3v) continuous input current (into any pin except power-supply and output pins) ...............................................................20ma continuous power dissipation 28-pin thin qfn (derate 20.8mw/ c above +70 c) ....1667mw 28-pin tssop-ep (derate 23.8mw/ c above +70 c) ..1905mw operating temperature range ...........................-40 c to +85 c storage temperature range .............................-65 c to +150 c junction temperature ......................................................+150 c lead temperature (soldering, 10s) .................................+300 c electrical characteristics (v dd = pv dd = 5.0v, gnd = pgnd = 0v, shdn = 5v, c bias = 1f, r in = r f = 15k ? , r l = . t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (note 1) parameter symbol conditions min typ max units supply voltage range v dd /pv dd inferred from psrr test 4.5 5.5 v MAX9760/max9761 13 32 btl mode, hps = 0v max9762/max9763 7 18 quiescent supply current (i vdd + i pvdd ) i dd single-ended mode, hps = v dd 718 ma shutdown current i shdn shdn = gnd 10 50 a switching time t sw gain or input switching 10 s c bias = 1f 300 turn-on time t on c bias = 0.1f 30 ms thermal shutdown threshold 160 o c thermal shutdown hysteresis 15 o c output amplifiers (speaker mode, hps = gnd) output offset voltage v os out_+ - out_-, a v = 1v/v 4 32 mv v dd = 4.5v to 5.5v 75 100 f = 1khz, v ripple = 200mv p-p 82 power-supply rejection ratio psrr (note 2) f = 20khz, v ripple = 200mv p-p 70 db r l = 8 ? 1 1.4 r l = 4 ? 2.6 output power p out f in = 1khz, thd+n < 1%, t a = +25 c r l = 3 ? 3 w p out = 1w, r l = 8 ? 0.005 total harmonic distortion plus noise thd+n f in = 1khz, bw = 22hz to 22khz p out = 2w, r l = 4 ? 0.01 % signal-to-noise ratio snr r l = 8 ? , p out = 1w, bw = 22hz to 22khz 95 db slew rate sr 1.6 v/s maximum capacitive load drive c l no sustained oscillations 1 nf crosstalk f in = 10khz 73 db
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = pv dd = 5.0v, gnd = pgnd = 0v, shdn = 5v, c bias = 1f, r in = r f = 15k ? , r l = . t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (note 1) parameter symbol conditions min typ max units output amplifiers (headphone mode, hps = v dd ) v dd = 4.5v to 5.5v 75 106 f = 1khz, v ripple = 200mv p-p 88 power-supply rejection ratio psrr (note 2) f = 20khz, v ripple = 200mv p-p 76 db r l = 32 ? 88 output power p out f in = 1khz, thd+n < 1%, t a = +25 c r l = 16 ? 120 200 mw p out = 60mw, r l = 32 ? 0.002 total harmonic distortion plus noise thd+n f in = 1khz, bw = 22hz to 22khz p out = 125mw, r l = 16 ? 0.002 % signal-to-noise ratio snr r l = 32 ? , bw = 22hz to 22khz, v out = 1v rms 92 db slew rate sr 1.8 v/s maximum capacitive load drive c l no sustained oscillations 2 nf crosstalk f in = 10khz 78 db standby supply (sv dd ) (note 3) v bias = 1.25v, v dd = 0v 425 750 sv dd current i svdd v bias = 2.5v, v dd = 5v 15 a bias voltage (bias) bias voltage v bias 2.35 2.5 2.65 v output resistance r bias 50 k ? digital inputs (mute, shdn , hps_en, gain a /b, in 1 1 1 1 /2) input voltage high v ih 2v input voltage low v il 0.8 v input leakage current i in 1a headphone sense input (hps) input voltage high v ih 0.9 x v dd v input voltage low v il 0.7 x v dd v input leakage current i in 1a
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 4 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = pv dd = 5.0v, gnd = pgnd = 0v, shdn = 5v, c bias = 1f, r in = r f = 15k ? , r l = . t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c.) (note 1) parameter symbol conditions min typ max units 2-wire serial interface (scl, sda, add, int ) (MAX9760/max9762) input voltage high v ih 2.6 v input voltage low v il 0.8 v input hysteresis 0.2 v input high leakage current i ih v in = 5v 1a input low leakage current i il v in = 0v 1a input capacitance c in 10 pf output voltage low v ol i ol = 3ma 0.4 v output current high i oh v oh = 5v 1 a timing characteristics (MAX9760/max9762) serial clock frequency f scl 400 khz bus free time between stop and start conditions t buf 1.3 s start condition hold time t hd:sta 0.6 s start condition setup time t su:sta 0.6 s clock period low t low 1.3 s clock period high t high 0.6 s data setup time t su:dat 100 ns data hold time t hd:dat (note 4) 0 0.9 s receive scl/sda rise time t r (note 5) 20 + 0.1c b 300 ns receive scl/sda fall time t f (note 5) 20 + 0.1c b 300 ns transmit sda fall time t f (note 5) 20 + 0.1c b 250 ns pulse width of suppressed spike t sp (note 6) 50 ns note 1: all devices are 100% production tested at +25 c. all temperature limits are guaranteed by design. note 2: psrr is specified with the amplifier inputs connected to gnd through r in and c in . note 3: refer to the sv dd section. note 4: a master device must provide a hold time of at least 300ns for the sda signal to bridge the undefined region of scl s falling edge. note 5: c b = total capacitance of one of the bus lines in picofarads. device tested with c b = 400pf. 1k ? pullup resistors connected from sda/scl to v dd . note 6: input filters on sda, scl, and add suppress noise spikes of less than 50ns.
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux _______________________________________________________________________________________ 5 total harmonic distortion plus noise vs. frequency (speaker mode) MAX9760 toc01 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k r l = 3 ? a v = 2v/v p out = 2.5w p out = 2w p out = 500mw p out = 1w total harmonic distortion plus noise vs. frequency (speaker mode) MAX9760 toc02 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k r l = 3 ? a v = 4v/v p out = 2.5w p out = 2w p out = 500mw p out = 1w total harmonic distortion plus noise vs. frequency (speaker mode) MAX9760 toc03 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k r l = 4 ? a v = 2v/v p out = 2w p out = 1w p out = 500mw p out = 250mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9760 toc04 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k r l = 4 ? a v = 4v/v p out = 250mw p out = 2w p out = 1w p out = 500mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9760 toc05 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k r l = 8 ? a v = 2v/v p out = 250mw p out = 1.2w p out = 1w p out = 500mw total harmonic distortion plus noise vs. frequency (speaker mode) MAX9760 toc06 frequency (hz) thd+n (%) 10k 1k 100 0.01 0.1 1 0.001 10 100k p out = 250mw p out = 1.2w p out = 1w p out = 500mw r l = 8 ? a v = 4v/v total harmonic distortion plus noise vs. output power (speaker mode) MAX9760 toc07 output power (w) thd+n (%) 3 2 1 0.01 10 1 0.1 100 0.001 04 a v = 2v/v r l = 3 ? f = 1khz f = 20hz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9760 toc08 output power (w) thd+n (%) 3 2 1 0.01 10 1 0.1 100 0.001 04 a v = 4v/v r l = 3 ? f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9760 toc09 output power (w) thd+n (%) 2.5 3.0 2.0 1.5 1.0 0.5 0.01 10 1 0.1 100 0.001 0 3.5 a v = 2v/v r l = 4 ? f = 20hz f = 1khz f = 10khz typical operating characteristics (v dd = pv dd = 5v, t a = +25 c, unless otherwise noted.)
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 6 _______________________________________________________________________________________ total harmonic distortion plus noise vs. output power (speaker mode) MAX9760 toc10 output power (w) thd+n (%) 2.5 3.0 2.0 1.5 1.0 0.5 0.01 10 1 0.1 100 0.001 0 3.5 a v = 4v/v r l = 4 ? f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9760 toc11 output power (w) thd+n (%) 1.5 1.0 0.5 0.01 10 1 0.1 100 0.001 0 2.0 a v = 2v/v r l = 8 ? f = 20hz f = 1khz f = 10khz total harmonic distortion plus noise vs. output power (speaker mode) MAX9760 toc12 output power (w) thd+n (%) 1.5 1.0 0.5 0.01 10 1 0.1 100 0.001 0 2.0 a v = 4v/v r l = 8 ? f = 20hz f = 1khz f = 10khz output power vs. temperature (speaker mode) MAX9760 toc13 temperature ( c) output power (w) 60 35 10 -15 1 2 3 4 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 3 ? output power vs. temperature (speaker mode) MAX9760 toc14 temperature ( c) output power (w) 60 35 10 -15 1 2 3 4 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 4 ? output power vs. temperature (speaker mode) MAX9760 toc15 temperature ( c) output power (w) 60 35 10 -15 0.5 1.0 1.5 2.0 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 8 ? output power vs. load resistance (speaker mode) MAX9760 toc16 load resistance ( ? ) output power (w) 10k 1k 100 10 1 2 3 4 5 0 1 100k f = 1khz thd+n = 10% thd+n = 1% power dissipation vs. output power (speaker mode) MAX9760 toc17 output power (w) power dissipation (w) 2.5 0.5 1.0 1.5 2.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 0 r l = 4 ? f = 1khz typical operating characteristics (continued) (v dd = pv dd = 5v, t a = +25 c, unless otherwise noted.)
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux _______________________________________________________________________________________ 7 crosstalk vs. frequency (speaker mode) MAX9760 toc19 frequency (hz) crosstalk (db) 10k 1k 100 -110 -100 -90 -80 -70 -60 -50 -40 -120 10 100k v in = 200mv p-p r l = 8 ? right to left left to right entering shutdown (speaker mode) MAX9760 toc20 100ms/div out_+ and out_- 2v/div 1v/div 200mv/div out_+ - out_- shdn r l = 8 ? input ac-coupled to gnd exiting shutdown (speaker mode) MAX9760 toc21 100ms/div out_+ and out_- 2v/div 1v/div 200mv/div out_+ - out_- shdn r l = 8 ? input ac-coupled to gnd entering power-down (speaker mode) MAX9760 toc22 100ms/div out_+ and out_- 2v/div 1v/div 200mv/div out_+ - out_- v dd r l = 8 ? input ac-coupled to gnd total harmonic distortion plus noise vs. frequency (headphone mode) MAX9760 toc23 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 0.0001 10 100k r l = 16 ? a v = 1v/v p out = 50mw p out = 25mw p out = 100mw p out = 150mw typical operating characteristics (continued) (v dd = pv dd = 5v, t a = +25 c, unless otherwise noted.) power-supply rejection ratio vs. frequency (speaker mode) MAX9760 toc18 frequency (hz) psrr (db) 10k 1k 100 90 80 70 60 50 40 100 10 100k v ripple = 200mv p-p
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 8 _______________________________________________________________________________________ total harmonic distortion plus noise vs. output power (headphone mode) MAX9760 toc28 output power (mw) thd+n (%) 250 200 150 100 50 0.01 0.001 10 1 0.1 100 0.0001 0 300 a v = 2v/v r l = 16 ? f = 20hz f = 1khz f = 10 khz total harmonic distortion plus noise vs. output power (headphone mode) MAX9760 toc29 output power (mw) thd+n (%) 100 75 50 25 0.01 0.001 10 1 0.1 100 0.0001 0 125 a v = 1v/v r l = 32 ? f = 20hz f = 1khz f = 10 khz total harmonic distortion plus noise vs. output power (headphone mode) MAX9760 toc30 output power (mw) thd+n (%) 100 75 50 25 0.01 0.001 10 1 0.1 100 0.0001 0 125 a v = 2v/v r l = 32 ? f = 20hz f = 1khz f = 10 khz output power vs. temperature (headphone mode) MAX9760 toc31 temperature ( c) output power (mw) 60 35 10 -15 50 100 200 150 250 300 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 16 ? output power vs. temperature (headphone mode) MAX9760 toc332 temperature ( c) output power (mw) 60 35 10 -15 25 50 100 75 125 150 0 -40 85 thd+n = 10% thd+n = 1% f = 1khz r l = 32 ? typical operating characteristics (continued) (v dd = pv dd = 5v, t a = +25 c, unless otherwise noted.) total harmonic distortion plus noise vs. frequency (headphone mode) MAX9760 toc25 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 0.0001 10 100k r l = 32 ? a v = 1v/v p out = 50mw p out = 25mw p out = 100mw p out = 150mw total harmonic distortion plus noise vs. frequency (headphone mode) MAX9760 toc26 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 0.0001 10 100k r l = 32 ? a v = 2v/v p out = 50mw p out = 25mw p out = 100mw p out = 150mw total harmonic distortion plus noise vs. output power (headphone mode) MAX9760 toc27 output power (mw) thd+n (%) 250 200 150 100 50 0.01 0.001 10 1 0.1 100 0.0001 0 300 a v = 1v/v r l = 16 ? f = 20hz f = 1khz f = 10 khz total harmonic distortion plus noise vs. frequency (headphone mode) MAX9760 toc24 frequency (hz) thd+n (%) 10k 1k 100 0.001 0.01 0.1 1 0.0001 10 100k r l = 16 ? a v = 2v/v p out = 50mw p out = 25mw p out = 100mw p out = 150mw
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux _______________________________________________________________________________________ 9 crosstalk vs. frequency (headphone mode) MAX9760 toc37 frequency (hz) crosstalk (db) 10k 1k 100 -110 -100 -90 -80 -70 -60 -50 -40 -120 10 100k v in = 200mv p-p r l = 16 ? right to left left to right exiting shutdown (headphone mode) MAX9760 toc38 100ms/div out_+ 2v/div 1v/div 200mv/div hp jack shdn r l = 16 ? input ac-coupled to gnd entering shutdown (headphone mode) MAX9760 toc39 100ms/div out_+ 2v/div 1v/div 200mv/div hp jack shdn r l = 16 ? input ac-coupled to gnd exiting power-down (headphone mode) MAX9760 toc40 100ms/div out_+ 2v/div 1v/div 200mv/div hp jack v dd r l = 16 ? input ac-coupled to gnd typical operating characteristics (continued) (v dd = pv dd = 5v, t a = +25 c, unless otherwise noted.) power dissipation vs. output power (headphone mode) MAX9760 toc35 output power (mw) power dissipation (mw) 100 20 40 60 80 10 20 30 40 50 60 70 0 0 r l = 32 ? f = 1khz power-supply rejection ratio vs. frequency (headphone mode) MAX9760 toc36 frequency (hz) psrr (db) 10k 1k 100 90 80 70 60 50 40 100 10 100k v ripple = 200mv p-p output power vs. load resistance (headphone mode) MAX9760 toc33 load resistance ( ? ) output power (mw) 1k 100 10 100 200 300 400 500 600 0 1 10k f = 1khz thd+n = 10% thd+n = 1% power dissipation vs. output power (headphone mode) MAX9760 toc34 output power (mw) power dissipation (mw) 50 100 150 200 20 40 60 80 100 120 0 0 r l = 16 ? f = 1khz
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 10 ______________________________________________________________________________________ exiting power-down (speaker mode) MAX9760 toc46 100ms/div out_+ and out_- 2v/div 1v/div 200mv/div out_+ - out_- v dd r l = 8 ? input ac-coupled to gnd typical operating characteristics (continued) (v dd = pv dd = 5v, t a = +25 c, unless otherwise noted.) entering power-down (headphone mode) MAX9760 toc41 100ms/div out_+ 2v/div 1v/div 200mv/div hp jack v dd r l = 16 ? input ac-coupled to gnd supply current vs. supply voltage (speaker mode) MAX9760 toc42 supply voltage (v) supply current (ma) 5.25 5.00 4.75 5 10 15 20 25 0 4.50 5.50 t a = +85 c t a = +25 c t a = -40 c supply current vs. supply voltage (headphone mode) MAX9760 toc43 supply voltage (v) supply current (ma) 5.25 5.00 4.75 2 4 6 8 10 12 0 4.50 5.50 t a = +85 c t a = +25 c t a = -40 c shutdown supply current vs. supply voltage max97960 toc44 supply voltage (v) supply current ( a) 5.25 5.00 4.75 5 10 15 20 0 4.50 5.50 t a = +85 c t a = +25 c t a = -40 c power dissipation vs. output power (speaker mode) MAX9760 toc45 output power (w) power dissipation (w) 1.50 0.25 0.50 0.75 1.00 1.25 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 0 r l = 8 ? f = 1khz
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 11 pin description pin MAX9760 max9761 max9762 max9763 qfn tssop qfn tssop qfn tssop qfn tssop name function 126 126 sda bidirectional serial data i/o 227 227 int c interrupt output 3 28 3 28 3 28 3 28 v dd power supply 41414141sv dd standby power supply. connect to a standby power supply that is always on, or connect to v dd through a schottky diode and bypass with 220f capacitor to gnd. short to v dd if clickless operation is not essential. 5 2 5 2 5 2 5 2 inl1 left-channel input 1 6 3 6 3 6 3 6 3 inl2 left-channel input 2 7 4 7 4 7 4 7 4 gainla left-channel gain set a 8 5 8 5 8 5 8 5 gainlb left-channel gain set b 9, 13, 23, 27 6, 10, 20, 24 9, 13, 23, 27 6, 10, 20, 24 9, 23, 27 6, 20, 24 9, 23, 27 6, 20, 24 pgnd power ground 10 7 10 7 10 7 10 7 outl+ left-channel bridged amplifier positive output. outl+ also serves as the left-channel headphone amplifier output. 11, 25 8, 22 11, 25 8, 22 11, 25 8, 22 11, 25 8, 22 pv dd output amplifier power supply 12 9 12 9 outl- left-channel bridged amplifier negative output 14 11 14 11 14 11 14 11 shdn active-low shutdown. connect shdn to v dd for normal operation. 15 12 15 12 add address select. a logic high sets the address lsb to 1, a logic low sets the address lsb to zero. 16 13 16 13 16 13 16 13 hps headphone sense input. a logic high configures the device as a single-ended headphone amp. a logic low configures the device as a btl speaker amp. 17 14 17 14 17 14 17 14 bias dc bias bypass. see bias capacitor selection section for capacitor selection. connect c bias from bias to gnd. 18 15 18 15 13 10 13 10 gnd ground
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 12 ______________________________________________________________________________________ detailed description the MAX9760 max9763 feature 3w btl speaker amplifiers, 200mw headphone amplifiers, input multi- plexers, headphone sensing, and comprehensive click- and-pop suppression. the MAX9760/ max9761 are stereo btl/headphone amplifiers. the max9762/ max9763 are mono btl/stereo headphone amplifiers. the MAX9760/max9762 are controlled through an i 2 c- compatible, 2-wire serial interface. the max9761/ max9763 are controlled through five logic inputs: mute, shdn , hps_en, gain a /b, and in 1 /2 (see selector guide ). the MAX9760 max9763 feature exceptional psrr (100db at 1khz), allowing these devices to operate from noisy digital supplies without the need for a linear regulator. the speaker amplifiers use a btl configuration. the signal path is composed of an input amplifier and an output amplifier. resistor r in sets the input amplifier s gain, and resistor r f sets the output amplifier s gain. the output of these two amplifiers serves as the input to a slave amplifier configured as an inverting unity-gain follower. this results in two outputs, identical in magni- tude, but 180 out of phase. the overall gain of the speaker amplifiers is twice the product of the two amplifier gains (see gain-setting resistor section). a feature of this architecture is that there is no phase inversion from input to output. pin description (continued) pin MAX9760 max9761 max9762 max9763 qfn tssop qfn tssop qfn tssop qfn tssop name function 19 16 19 16 19 16 19 16 inr1 right-channel input 1 20 17 20 17 20 17 20 17 inr2 right-channel input 2 21 18 21 18 21 18 21 18 gainra right-channel gain set a 22 19 22 19 22 19 22 19 gainrb right-channel gain set b 24 21 24 21 24 21 24 21 outr+ right-channel bridged amplifier positive output. outr+ also serves as the right-channel headphone amplifier output. 26 23 26 23 26 23 26 23 outr- right-channel bridged amplifier negative output 28 25 28 25 scl serial clock line 12 9 12 9 n.c. no connection. not internally connected. 18 15 18 15 gainm mono gain set 126 1 26 mute active-high mute input 227 2 27 hps_en headphone enable. a logic high enables hps. a logic low disables hps and the device is always configured as a btl speaker amp. 15 12 15 12 gain a /b gain select. a logic low selects the gain set by gain_a. a logic high selects the gain set by gain_b. 28 25 28 25 in 1 /2 input select. a logic low selects amplifier input 1. a logic high selects amplifier input 2.
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 13 when configured as a headphone (single-ended) ampli- fier, the slave amplifier is disabled, muting the speaker and the main amplifier drives the headphone. the MAX9760 max9763 can deliver 3w of continuous aver- age power into a 3 ? load with less than 1% thd+n in speaker mode, and 200mw of continuous average power into a 16 ? load with less than 1% thd+n in headphone mode. these devices also feature thermal overload protection. mono mode the max9762/max9763 are 3w mono speaker ampli- fiers, 200mw stereo headphone amplifiers, and a mixer/attenuator (see the max9762/max9763 functional diagram ). in speaker (mono) mode, the mixer/attenuator combines the two stereo inputs (inl_ and inr_) and attenuates the resultant signal by a factor of 2. this allows for full reproduction of a stereo signal through a single speaker, while maintaining optimum headroom. the resistor connected between gainm and outr+, sets the gain of the devices in speaker mode (see the max9762 functional diagram ). this allows the speaker amplifier to have a different gain and feedback network from the headphone amplifier. bias these devices operate from a single 5v supply, and feature an internally generated, power-supply indepen- dent, common-mode bias voltage of 2.5v referenced to gnd. bias provides both click-and-pop suppression and sets the dc bias level for the audio outputs. bias is internally connected to the noninverting input of each speaker amplifier (see typical application circuit/ functional diagram ). choose the value of the bypass capacitor as described in the bias capacitor section. no external load should be applied to bias. any load lowers the bias voltage, affecting the overall perfor- mance of the device. input multiplexer each amplifier features a 2:1 input multiplexer, allowing input selection between two stereo sources. both multi- plexers are controlled by bit 1 in the control register (MAX9760/max9762) or by the in 1 /2 pin (max9761/ max9763). a logic low selects input in_1 and a logic high selects input in_2. the input multiplexer can also be used to further expand the number of gain options available from the MAX9760 max9763 family. connecting the audio source to the device through two different input resis- tors (figure 1) increases the number of gain options from two to four (MAX9760/max9761) and from three to six (max9762/max9763). additionally, the input multi- plexer allows a speaker equalization network to be switched into the speaker signal path. this is typically useful in optimizing acoustic response from speakers with small physical dimensions. headphone sense enable the hps pin is enabled by hps_en (max9762/ max9763) or the hpsd bit (MAX9760/max9761). hpsd or hps_en determines whether the device is in automatic detection mode or fixed mode operation (see tables 1a and 1b). headphone sense input (hps) a voltage on hps less than 0.7 ? v dd sets the device to speaker mode. a voltage greater than 0.9 ? v dd dis- ables the inverting bridge amplifier (out_-), which mutes the speaker amplifier and sets the device into headphone mode. for automatic headphone detection, connect hps to the control pin of a 3-wire headphone jack as shown in figure 2. with no headphone present, the resistive volt- age-divider created by r1 and r2 sets the voltage on hps to be less than 0.7 ? v dd , setting the device to speaker mode and the gain setting defaults to gaina (MAX9760/max9762). when a headphone plug is insert- ed into the jack, the control pin is disconnected from the tip contact, and hps is pulled to v dd through r1, setting the device into headphone mode and the gain-setting defaults to gainb (MAX9760/max9762) (see gain select section). place a resistor in series with the control pin and hps (r3) to prevent any audio signal from cou- pling into hps when the device is in speaker mode. shutdown the MAX9760 max9763 feature a 10a, low-power shutdown mode that reduces quiescent current con- sumption and extends battery life. the drive amplifiers and bias circuitry are disabled, the amplifier outputs (out_) go high impedance, and bias is driven to MAX9760 audio input 15k ? 30k ? in_1 in_2 figure 1. using the input multiplexer for gain setting
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 14 ______________________________________________________________________________________ gnd. driving shdn low places the devices into shut- down mode, disables the interface, and resets the i 2 c registers to a default state. a logic high on shdn enables the devices. MAX9760/max9762 software shutdown a logic high on bit 0 of the shdn register places the MAX9760/max9762 in shutdown mode. a logic low enables the device. the digital section of the MAX9760/max9762 remains active when the device is shut down through the interface. all devices feature a logic low on the shdn input. mute all devices feature a mute mode. when the device is muted, the input is disconnected from the amplifiers. mute does not shut down the device. MAX9760/max9762 mute the MAX9760/max9762 mute mode is selected by writing to the mute register (see the command byte definitions section). the left and right channels can be independently muted. max9761/max9763 mute the max9761/max9763 feature an active-high mute input that mutes both channels. click-and-pop suppression the MAX9760 max9763 feature maxim s patented comprehensive click-and-pop suppression. during startup and shutdown, the common-mode bias voltage of the amplifiers is slowly ramped to and from the dc bias point using an s-shaped waveform. in headphone mode, this waveform shapes the frequency spectrum, minimizing the amount of audible components present at the headphone. in speaker mode, the btl amplifiers start up in the same fashion as in headphone mode. when entering shutdown, both amplifier outputs ramp to gnd quickly and simultaneously. the MAX9760 max9763 can also be connected to a standby power source that ensures that the device undergoes its full shutdown cycle even after power has been removed. standby power supply (sv dd ) the MAX9760 max9763 feature a patented system that provides clickless power-down when power is inadvertently removed from the device. sv dd is an optional secondary supply that powers the device through its shutdown cycle when v dd is removed. during this cycle, the amplifier output dc level slowly ramps to gnd, ensuring clickless power-down. if click- less power-down is required, connect sv dd to either a secondary power supply that is always on, or connect a reservoir capacitor from sv dd to gnd. sv dd does not need to be connected to either a secondary power supply or reservoir capacitor for normal device opera- tion. if click-and-pop suppression during power-down is not required, connect sv dd to v dd directly. MAX9760 max9763 r3 47k ? r1 680k ? r2 10k ? hps v dd outl+ outr+ figure 2. hps configuration circuit inputs hpsd hps spkr/hp mode MAX9760 gain path* max9762 gain path* 0 0 x btl a m 01 x se b b 1 x 0 btl a or b m 1 x 1 se a or b a or b table 1a. hps setting (MAX9760/max9761) inputs hpsen hps mode max9761 gain path* max9763 gain path* 0 x btl a or b m 1 0 btl a or b m 1 1 se a or b a or b table 1b. hps setting (max9762/max9763) *note: a gaina path selected b gainb path selected m gainm path selected a or b gain path selected by gainab control bit in register 02h *note: a or b gain path selected by external gainab m gainm path selected
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 15 the clickless power-down cycle only occurs when the device is in headphone mode. the speaker mode is inherently clickless, the differential architecture cancels the dc shift across the speaker. the MAX9760 max9763 btl outputs are pulled to gnd quickly and simultaneously, resulting in no audible components. if the MAX9760 max9763 are only used as speaker amplifiers, then reservoir capacitors or secondary sup- plies are not necessary. when using a reservoir capacitor, a 220f capacitor provides optimum charge storage for the shutdown cycle for all conditions. if a smaller reservoir capacitor is desired, decrease the size of c bias . a smaller c bias causes the output dc level to decay at a faster rate, increasing the audible content at the speaker, but reducing the duration of the shutdown cycle. digital interface the MAX9760/max9762 feature an i 2 c/smbus-compat- ible 2-wire serial interface consisting of a serial data line (sda) and a serial clock line (scl). sda and scl facilitate bidirectional communication between the MAX9760/max9762 and the master at clock rates up to 400khz. figure 3 shows the 2-wire interface timing dia- gram. the MAX9760/max9762 are transmit/receive slave-only devices, relying upon a master to generate a clock signal. the master (typically a microcontroller) ini- tiates data transfer on the bus and generates scl to permit that transfer. a master device communicates to the MAX9760/ max9762 by transmitting the proper address followed by a command and/or data words. each transmit sequence is framed by a start (s) or repeated start (s r ) condition and a stop (p) condition. each word transmitted over the bus is 8 bits long and is always followed by an acknowledge clock pulse. the MAX9760/max9762 sda and scl amplifiers are open-drain outputs requiring a pullup resistor (500 ? or greater) to generate a logic high voltage. series resis- tors in line with sda and scl are optional. these series resistors protect the input stages of the devices from high-voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals. bit transfer one data bit is transferred during each scl clock cycle. the data on sda must remain stable during the high period of the scl clock pulse. changes in sda while scl is high are control signals (see start and stop conditions section). sda and scl idle high when the i 2 c bus is not busy. start and stop conditions when the serial interface is inactive, sda and scl idle high. a master device initiates communication by issu- ing a start condition. a start condition is a high-to- low transition on sda with scl high. a stop condition is a low-to-high transition on sda while scl is high (figure 4). a start condition from the master signals the beginning of a transmission to the MAX9760/ scl sda start condition stop condition repeated start condition start condition t hd, sta t hd, sta t hd, sta t sp t buf t su, sto t low t su, dat t hd, dat t high t r t f figure 3. 2-wire serial interface timing diagram scl sda ssrp figure 4. start/stop conditions
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 16 ______________________________________________________________________________________ max9762. the master terminates transmission by issu- ing the stop condition, this frees the bus. if a repeat- ed start condition is generated instead of a stop condition, the bus remains active. early stop conditions the MAX9760/max9762 recognize a stop condition at any point during the transmission except if a stop con- dition occurs in the same high pulse as a start condi- tion (figure 5). this condition is not a legal i 2 c format, at least one clock pulse must separate any start and stop conditions. repeated start conditions a repeated start (s r ) condition may indicate a change of data direction on the bus. such a change occurs when a command word is required to initiate a read operation. s r may also be used when the bus master is writing to several i 2 c devices and does not want to relinquish control of the bus. the MAX9760/ max9762 serial interface supports continuous write operations with or without an s r condition separating them. continuous read operations require s r conditions because of the change in direction of data flow. acknowledge bit (ack) the acknowledge bit (ack) is the ninth bit attached to any 8-bit data word. the receiving device always gen- erates ack. the MAX9760/max9762 generate an ack when receiving an address or data by pulling sda low during the night clock period. when transmitting data, the MAX9760/max9762 wait for the receiving device to generate an ack. monitoring ack allows for detection of unsuccessful data transfers. an unsuccessful data transfer occurs if a receiving device is busy or if a sys- tem fault has occurred. in the event of an unsuccessful data transfer, the bus master should reattempt commu- nication at a later time. slave address the bus master initiates communication with a slave device by issuing a start condition followed by a 7-bit slave address (figure 6). when idle, the MAX9760/ max9762 wait for a start condition followed by its slave address. the lsb of the address word is the read/ write (r/ w ) bit. r/ w indicates whether the master is writing to or reading from the MAX9760/max9762 (r/ w = 0 selects the write condition, r/ w = 1 selects the read condition). after receiving the proper address, the MAX9760/max9762 issue an ack by pulling sda low for one clock cycle. the MAX9760/max9762 have a factory-/user-pro- grammed address. address bits a6 a2 are preset, while a0 and a1 is set by add. connect add to either v dd , gnd, scl, or sda to change the last 2 bits of the slave address ( table 2). write data format there are three registers that configure the MAX9760/max9762: the mute register, shdn register, and control register. in write data mode (r/ w = 0), the register address and data byte follow the device address (figure 7). mute register the mute register (01hex) is a read/write register that sets the mute status of the device. bit 3 (mutel) of the mute register controls the left channel, bit 4 (muter) controls the right channel. a logic high mutes the respective channel, a logic low brings the channel out of mute. shdn register the shdn register (02hex) is a read/write register that controls the power-up state of the device. a logic high in bit 0 of the shdn register shuts down the device; a logic low turns on the device. a logic high is required in bits 2 to 7 to reset all registers to their default settings. scl sda stop start scl sda illegal stop start legal stop condition illegal early stop condition figure 5. early stop condition s a6a5a4a3a2a1a0r/w figure 6. slave address byte definition
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 17 control register the control register (03hex) is a read/write register that determines the device configuration. bit 1 (in1/in2) controls the input multiplexer, a logic high selects input 1, a logic low selects input 2. bit 2 (hps_d) controls the headphone sensing. a logic low configures the device in automatic headphone detection mode. a logic high disables the hps input. bit 3 (gaina/b) controls the gain-select multiplexer. a logic low selects gaina. a logic high selects gainb. gaina/b is ignored when hps_d = 0. bit 4 (spkr/hp) selects the amplifier oper- ating mode when hps_d = 1. a logic high selects speaker mode and a logic low selects headphone mode. s address 7 bits 8 bits 8 bits 1 wr ack command ack data ack p i 2 c slave address. selects device. register address. selects register to be written to. register data i 2 c slave address. selects device. data from selected register s address 7 bits 8 bits 8 bits 1 wr ack command ack data p i 2 c slave address. selects device. register address. selects register to be read. s address 7 bits wr ack figure 7. write/read data format example add connection i 2 c address gnd 100 1000 v dd 100 1001 sda 100 1010 scl 100 1011 table 2. i 2 c slave addresses register address 0000 0001 bit name value description 7 x don t care 6 x don t care 5 x don t care 0* unmute right channel 4 muter 1 mute right channel 0* unmute left channel 3 mutel 1 mute left channel 2 x don t care 1 x don t care 0 x don t care table 3. mute register format *default state. register address 0000 0010 bit name value description 0* 7 reset 1 reset device 0* 6 reset 1 reset device 0* 5 reset 1 reset device 0* 4 reset 1 reset device 0* 3 reset 1 reset device 0* 2 reset 1 reset device 1 x don t care 0* normal operation 0 shdn 1 shutdown table 4. shdn register format *default state.
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 18 ______________________________________________________________________________________ read data format in read mode (r/ w = 1), the MAX9760/max9762 write the contents of the selected register to the bus. the direction of the data flow reverses following the address acknowledge by the MAX9760/max9761. the master device reads the contents of all registers, including the read-only status register. table 6 shows the status register format. interrupt output ( int ) the MAX9760/max9762 include an interrupt output ( int ) that can indicate to a master device that an event has occurred. int is triggered when the state of hps changes. during normal operation, int idles high. if a headphone is inserted/removed from the jack and that action is detected by hps, int pulls the line low. int remains low until a read data operation is executed. i 2 c compatibility the MAX9760/max9762 are compatible with existing i 2 c systems. scl and sda are high-impedance inputs; sda has an open drain that pulls the data line low during the ninth clock pulse. the communication protocol supports the standard i 2 c 8-bit communications. the general call address is ignored. the MAX9760/max9762 addresses are compatible with the 7-bit i 2 c addressing protocol only. no 10-bit formats are supported. applications information btl speaker amplifiers the MAX9760 max9763 feature speaker amplifiers designed to drive a load differentially, a configuration referred to as bridge-tied load (btl). the btl configu- ration (figure 8) offers advantages over the single- ended configuration, where one side of the load is connected to ground. driving the load differentially doubles the output voltage compared to a single- ended amplifier under similar conditions. thus, the devices differential gain is twice the closed-loop gain of the input amplifier. the effective gain is given by: substituting 2 x v out(p-p) for v out(p-p) into the follow- ing equations yields four times the output power due to doubling of the output voltage: since the differential outputs are biased at midsupply, there is no net dc voltage across the load. this elimi- nates the need for dc-blocking capacitors required for single-ended amplifiers. these capacitors can be large, expensive, consume board space, and degrade low-frequency performance. v v p v r rms out p p out rms l = = ? () 22 2 a r r vd f in = 2 register address 0000 0011 bit name value description 7 x don t care 6 x don t care 5 x don t care 0* speaker mode selected 4 spkr/hp 1 headphone mode selected 0* gain-setting a selected 3 gaina/b 1 gain-setting b selected 0* automatic headphone detection enabled 2 hps_d 1 automatic headphone detection disabled (hps ignored). 0* input 1 selected 1 in1/in2 1 input 2 selected 0 x don t care table 5. control register format +1 v out(p-p) 2 x v out(p-p) v out(p-p) -1 figure 8. bridge-tied load configuration
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 19 when the MAX9760/max9762 are configured to auto- matically detect the presence of a headphone jack, the device defaults to gain setting a when the device is in speaker mode. when the max9762/max9763 are con- figured as speaker amplifiers, the gain setting defaults to the mono setting (gainm). single-ended headphone amplifier the MAX9760 max9763 can be configured as single- ended headphone amplifiers through software or by sensing the presence of a headphone plug (hps). in headphone mode, the inverting output of the btl amplifier is disabled, muting the speaker. the gain is 1/2 that of the device in speaker mode, and the output power is reduced by a factor of 4. in headphone mode, the load must be capacitively coupled to the device, blocking the dc bias voltage from the load (see typical application circuit). power dissipation and heat sinking under normal operating conditions, the MAX9760 max9763 can dissipate a significant amount of power. the maximum power dissipation for each package is given in the absolute maximum ratings section under continuous power dissipation or can be calculated by the following equation: where t j(max) is +150 c, t a is the ambient tempera- ture, and ja is the reciprocal of the derating factor in c/w as specified in the absolute maximum ratings section. for example, ja of the qfn package is +42 c/w. the increase in power delivered by the btl configura- tion directly results in an increase in internal power dis- sipation over the single-ended configuration. the maximum power dissipation for a given v dd and load is given by the following equation: if the power dissipation for a given application exceeds the maximum allowed for a given package, either reduce v dd , increase load impedance, decrease the ambient temperature, or add heat sinking to the device. large output, supply, and ground pc board traces improve the maximum power dissipation in the package. thermal overload protection limits total power dissipa- tion in these devices. when the junction temperature exceeds +160 c, the thermal protection circuitry dis- ables the amplifier output stage. the amplifiers are enabled once the junction temperature cools by 15 c. this results in a pulsing output under continuous ther- mal-overload conditions as the device heats and cools. p v r diss max dd l () = 2 2 2 p tt disspkg max j max a ja () () = ? register address 0000 0000 bit name value description 0 device temperature below thermal limit 7 thrm 1 device temperature exceeding thermal limit 0 outr- current below current limit 6 ampr- 1 outr- current exceeding current limit 0 outr+ current below current limit 5 ampr+ 1 outr+ current exceeding current limit 0 outl- current below current limit 4 ampl- 1 outl- current exceeding current limit 0 outl+ current below current limit 3 ampl+ 1 outl+ current exceeding current limit 0 device in speaker mode 2 hpsts 1 device in headphone mode 1 x don t care 0 x don t care table 6. status register format
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 20 ______________________________________________________________________________________ component selection gain-setting resistors external feedback components set the gain of the MAX9760 max9763. resistor r in sets the gain of the input amplifier (a vin ) and resistor r f sets the gain of the second stage amplifier (a vout ): combining a vin and a vout , r in and r f set the single- ended gain of the device as follows: as shown, the two-stage amplifier architecture results in a noninverting gain configuration, preserving absolute phase through the MAX9760 max9763. the gain of the device in btl mode is twice that of the sin- gle-ended mode. choose r in between 10k ? and 15k ? and r f between 15k ? and 100k ? . input filter the input capacitor (c in ), in conjunction with r in , forms a highpass filter that removes the dc bias from an incoming signal. the ac-coupling capacitor allows the amplifier to bias the signal to an optimum dc level. assuming zero-source impedance, the -3db point of the highpass filter is given by: choose r in according to the gain-setting resistors section. choose the c in such that f -3db is well below the lowest frequency of interest. setting f -3db too high affects the amplifier s low-frequency response. use capacitors whose dielectrics have low-voltage coeffi- cients, such as tantalum or aluminum electrolytic. capacitors with high-voltage coefficients, such as ceramics, may result in an increased distortion at low frequencies. other considerations when designing the input filter include the constraints of the overall system, the actual frequency band of interest, and click-and- pop suppression. output-coupling capacitor the MAX9760/max9763 require output-coupling capacitors to operate in single-ended (headphone) mode. the output-coupling capacitor blocks the dc component of the amplifier output, preventing dc cur- rent from flowing to the load. the output capacitor and the load impedance form a highpass filter with a -3db point determined by: as with the input capacitor, choose c out such that f -3db is well below the lowest frequency of interest. setting f -3db too high affects the amplifier s low-fre- quency response. load impedance is a concern when choosing c out . load impedance can vary, changing the -3db point of the output filter. a lower impedance increases the cor- ner frequency, degrading low-frequency response. select c out such that the worst-case load/c out com- bination yields an adequate response. select capaci- tors with low esr to minimize resistive losses and optimize power transfer to the load. bias capacitor bias is the output of the internally generated 2.5vdc bias voltage. the bias bypass capacitor, c bias , improves psrr and thd+n by reducing power supply and other noise sources at the common-mode bias node, and also generates the clickless/popless, start- up/shutdown dc bias waveforms for the speaker ampli- fiers. bypass bias with a 1f capacitor to gnd. supply bypassing proper power-supply bypassing ensures low-noise, low-distortion performance. place a 0.1f ceramic capacitor from v dd to gnd. add additional bulk capacitance as required by the application, typically 100f. bypass pv dd with a 100f capacitor to gnd. locate bypass capacitors as close to the device as possible. gain select the MAX9760 max9763 feature multiple gain settings on each channel, making available different gain and feedback configurations. the gain-setting resistor (r f ) is connected between the amplifier output (out_+) and the gain setpoint (gain_). an internal multiplexer switches between the different feedback resistors f rc db l out ? = 3 1 2 f rc db in in ? = 3 1 2 aa a k r r k r r v vin vout in ff in = =? ? ? ? ? ? ? ? ? ? ? ? ? ? =+ ? ? ? ? ? ? 10 10 ? ? a k r a r k vin in vout f =? ? ? ? ? ? ? =? ? ? ? ? ? ? 10 10 ? ? ,
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 21 depending on the status of the gain control input. the stereo MAX9760/max9761 feature two gain options per channel. the mono max9762/max9763 feature two gain options per single-ended channel, and a single gain option for the mono speaker amplifier (see tables 1a and 1b for the gain-setting options). the max9762 defaults to gainm in speaker mode and can switch between gaina and gainb in headphone mode. bass boost circuit headphones typically have a poor low-frequency response due to speaker and enclosure size limitations. a bass boost circuit compensates the poor low-frequen- cy response (figure 9). at low frequencies, the capaci- tor c f is an open circuit, and the effective impedance in the feedback loop (r f(eff) ) is r f(eff) = r f1 . at the frequency: where the impedance, c f, begins to decrease, and at high frequencies, the c f is a short circuit. here the impedance of the feedback loop is: assuming r f1 = r f2 , then r f(eff) at low frequencies is twice that of r f(eff) at high frequencies (figure 10). thus, the amplifier has more gain at lower frequencies, boosting the system s bass response. set the gain roll- off frequency based upon the response of the speaker and enclosure. layout and grounding good pc board layout is essential for optimizing perfor- mance. use large traces for the power-supply inputs and amplifier outputs to minimize losses due to para- sitic trace resistance, as well as route heat away from the device. good grounding improves audio perfor- mance, minimizes crosstalk between channels, and prevents any digital switching noise from coupling into the audio signal. if digital signal lines must cross over or under audio signal lines, ensure that they cross per- pendicular to each other. the MAX9760 max9763 qfn and tssop-ep pack- ages feature exposed thermal pads on their under- sides. this pad lowers the package s thermal resistance by providing a direct heat conduction path from the die to the printed circuit board. connect the pad to signal ground by using a large pad, or multiple vias to the ground plane. r rr rr f eff ff ff () = + 12 12 1 2 2 rc ff v bias r in r f2 r f1 c f figure 9. bass boost circuit r f1 r f1 r f2 r in r in 2 r f2 c f 1 frequency gain figure 10. bass boost response
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 22 ______________________________________________________________________________________ hpf hpf microcontroller codec max4060 aux_in bias in+ in- out MAX9760 inr2 inr1 inl2 inl1 sv dd bias 1 f 0.1 f 0.68 f 0.68 f 0.68 f 0.68 f 0.047 f 0.047 f 220 f 220 f 27.4k ? 27.4k ? 47k ? 10k ? 10k ? 680k ? 33.2k ? 33.2k ? 15k ? 15k ? 15k ? 15k ? 15k ? 10k ? 1k ? 1k ? 15k ? scl sda add int shdn gainlb gainla outl+ outl- outr+ gainra gainrb outr- hps v dd v dd v dd pv dd v dd typical application circuit
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 23 MAX9760 2:1 input mux inl1 10k ? pv dd sv dd v dd v dd gainlb gainla outl+ outl- 10k ? 10k ? 10k ? audio input audio input inl2 bias bias gain set mux 2:1 input mux inr1 10k ? gainrb gainra outr+ outr- 10k ? 10k ? 10k ? audio input audio input inr2 scl sda add int logic hps hps gnd gain set mux shdn functional diagrams
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 24 ______________________________________________________________________________________ max9761 2:1 input mux inl1 10k ? pv dd sv dd v dd gainlb gainla outl+ outl- 10k ? 10k ? 10k ? inl2 bias bias gain set mux 2:1 input mux inr1 10k ? gainrb gainra outr+ outr- 10k ? 10k ? 10k ? inr2 mute hp_en gaina/b in1/in2 logic hps hps gnd gain set mux shdn functional diagrams (continued)
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 25 max9762 2:1 input mux inr1 10k ? pv dd sv dd v dd gainrb gainra outr+ outr- 10k ? 10k ? 10k ? inr2 bias mixer bias gain set mux gainm 2:1 input mux inl1 10k ? gainlb gainla outl 10k ? inl2 scl sda add int logic hps hps gnd gain set mux shdn functional diagrams (continued)
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 26 ______________________________________________________________________________________ max9763 2:1 input mux inr1 10k ? pv dd sv dd v dd gainrb gainra outr+ outr- 10k ? 10k ? 10k ? inr2 bias mixer bias gain set mux gainm 2:1 input mux inl1 10k ? gainlb gainla outl 10k ? inl2 hp_en mute gaina/b in1/in2 logic hps hps gnd gain set mux shdn functional diagrams (continued)
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 27 28 27 26 25 24 23 22 8 9 10 11 12 13 14 15 16 17 18 19 20 21 7 6 5 4 3 2 1 MAX9760 thin qfn top view int sda v dd sv dd inl1 inl2 gainla scl pgnd outr- pv dd outr+ pgnd gainrb gainra inr2 inr1 gnd bias hps add shdn pgnd outl- pv dd outl+ pgnd gainlb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v dd int sda scl pgnd outr- gnd pv dd outr+ pgnd gainrb gainra inr2 inr1 bias hps add shdn pgnd outl- pv dd outl+ pgnd gainlb gainla inl2 inl1 sv dd tssop MAX9760 pin configurations 28 27 26 25 24 23 22 8 9 10 11 12 13 14 15 16 17 18 19 20 21 7 6 5 4 3 2 1 max9761 thin qfn top view hps_en mute v dd sv dd inl1 inl2 gainla in1/2 pgnd outr- pv dd outr+ pgnd gainrb gainra inr2 inr1 gnd bias hps gaina/b shdn pgnd outl- pv dd outl+ pgnd gainlb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v dd hps_en mute in/1v2 pgnd outr- gnd pv dd outr+ pgnd gainrb gainra inr2 inr1 bias hps gain/avb shdn pgnd outl- pv dd outl+ pgnd gainlb gainla inl2 inl1 sv dd tssop max9761
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 28 ______________________________________________________________________________________ 28 27 26 25 24 23 22 8 9 10 11 12 13 14 15 16 17 18 19 20 21 7 6 5 4 3 2 1 max9762 thin qfn top view int sda v dd sv dd inl1 inl2 gainla scl pgnd outr- pv dd outr+ pgnd gainrb gainra inr2 inr1 gainm bias hps add shdn gnd n.c. pv dd outl+ pgnd gainlb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v dd int sda scl pgnd outr- gainm pv dd outr+ pgnd gainrb gainra inr2 inr1 bias hps add shdn gnd n.c. pv dd outl+ pgnd gainlb gainla inl2 inl1 sv dd tssop max9762 pin configurations (continued) 28 27 26 25 24 23 22 8 9 10 11 12 13 14 15 16 17 18 19 20 21 7 6 5 4 3 2 1 max9763 thin qfn top view hps_en mute v dd sv dd inl1 inl2 gainla in1/2 pgnd outr- pv dd outr+ pgnd gainrb gainra inr2 inr1 gainm bias hps gaina/b shdn gnd n.c. pv dd outl+ pgnd gainlb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v dd hps_en mute in1/2 pgnd outr- gainm pv dd outr+ pgnd gainrb gainra inr2 inr1 bias hps gaina/b shdn gnd n.c. pv dd outl+ pgnd gainlb gainla inl2 inl1 sv dd tssop max9763
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux ______________________________________________________________________________________ 29 ordering information (continued) part temp range pin-package max9761 eti -40 c to +85 c 28 thin qfn-ep* max9761eui -40 c to +85 c 28 tssop-ep* max9762 eti -40 c to +85 c 28 thin qfn-ep* max9762eui -40 c to +85 c 28 tssop-ep* max9763 eti -40 c to +85 c 28 thin qfn-ep* max9763eui -40 c to +85 c 28 tssop-ep* chip information MAX9760 transistor count: 5256 max9761 transistor count: 2715 max9762 transistor count: 5046 max9763 transistor count: 2505 process: bicmos selector guide part control interface speaker amplifier headphone amplifier input mux MAX9760 i 2 c compatible stereo stereo yes max9761 parallel stereo stereo yes max9762 i 2 c compatible mono stereo yes max9763 parallel mono stereo yes *ep = exposed paddle.
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux 30 ______________________________________________________________________________________ package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) qfn thin.eps d2 (nd-1) x e e d c pin # 1 i.d. (ne-1) x e e/2 e 0.08 c 0.10 c a a1 a3 detail a 0.15 c b 0.15 c a document control no. 21-0140 package outline 16, 20, 28, 32l, qfn thin, 5x5x0.8 mm proprietary information approval title: c rev. 2 1 e2/2 e2 0.10 m c a b pin # 1 i.d. b 0.35x45 l d/2 d2/2 l c l c e e l cc l k k l l 2 2 21-0140 rev. document control no. approval proprietary information title: common dimensions exposed pad variations 1. dimensioning & tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 identifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from terminal tip. 6. nd and ne refer to the number of terminals on each d and e side respectively. 7. depopulation is possible in a symmetrical fashion. 8. coplanarity applies to the exposed heat sink slug as well as the terminals. 9. drawing conforms to jedec mo220. notes: 10. warpage shall not exceed 0.10 mm. c package outline 16, 20, 28, 32l, qfn thin, 5x5x0.8 mm
MAX9760?ax9763 stereo 3w audio power amplifiers with headphone drive and input mux maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 31 ? 2003 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) tssop, 4.0,exp pads.eps

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